The invention relates to a method for configuring low-noise integrated amplifier circuits.
To use prior art integrated low-noise amplifiers, the user has to develop a matching circuit that optimally matches the input impedance of the low-noise amplifier to the output impedance of the preceding stage or of the preceding transfer element. Such a configuration minimizes the reflection of the power at the input of the low-noise amplifier.
Respective xcfx80 equivalent circuit diagrams of a bipolar transistor are specified on pages 36 and 39 of the document Gray, Paul xe2x80x9cAnalysis and Design of Analog Integrated Circuitsxe2x80x9d. The calculation of the noise properties of such a transistor is explained on page 776 et seq.
The document xe2x80x9cTheoretische Grenzen fxc3xcr Anpassungsnetzwerke in optischen Empfxc3xa4ngern (Teil II)xe2x80x9d [Theoretical Limits for Matching Networks in Optical Receivers (Part II)], A. Czylwik, Frequenz, Vol. 49, No. 3/04, pages 58 to 65, specifies a method for power and noise matching of a field-effect transistor to a photodiode.
Depending on the noise properties of the amplifier, however, it has not been possible to ensure that the noise figure of the amplifier is less than a predetermined value for the noise figure.
Moreover, the realization and dimensioning of the matching circuit by external components means an additional outlay with respect to the circuitry of the integrated low-noise amplifier.
It is accordingly an object of the invention to provide a method for configuring low-noise integrated amplifier circuits that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices and methods of this general type and that requires no additional external circuitry when using the amplifier circuit.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a method for producing a low-noise integrated amplifier circuit including the steps of providing an integrated amplifier circuit having an input stage with one of the group consisting of a common-emitter bipolar transistor and a common-source field-effect transistor, each transistor having a collector with an effective load, the amplifier circuit having an input impedance, a noise figure, and integrated components with component values, connecting a transfer element upstream with respect to the amplifier circuit, the transfer element having a predetermined output impedance with a real part, and dimensioning the amplifier circuit by (a) noise matching the amplifier circuit to the real part of the predetermined output impedance of the transfer element by determining a range of resistances in which the noise figure of the amplifier circuit is less than a predetermined noise figure by at least one of the group consisting of first defining process parameters during the production of the amplifier circuit, first defining geometry parameters of at least one of the integrated components of the amplifier circuit, a dimensioning of the component values, and first defining one of a collector current and a drain current, the noise figure of the amplifier circuit being dependent on a real generator resistance, and by determining a value of the real part of the predetermined output impedance lying in the range, and, for the first definition of the parameters of the amplifier circuit, determining a minimum noise figure and an associated optimum generator resistance and realizing the amplifier circuit with the associated parameters if the minimum noise figure is less than or equal to the predetermined noise figure and the optimum generator resistance corresponds, within predetermined tolerances, to the real part of the predetermined output impedance, otherwise performing a new definition of the parameters, replacing the first definition, with other parameters deviating from the first definition, and (b) subsequently, power matching the input impedance of the amplifier circuit to the predetermined output impedance by selecting the effective load on the collector of the transistor to produce a complex voltage gain generating, due to the Miller effect, an input impedance equal to a complex conjugate of the predetermined output impedance.
The invention is based on the insight that, by the definition of different parameters (such as process parameters during the production of the integrated low-noise amplifier and/or geometry parameters of one or more components of the amplifier and/or component values of the amplifier and/or the collector current or the drain current) xe2x80x9cnoise matchingxe2x80x9d to a predetermined output impedance of a preceding transfer element can be achieved when the parameters are chosen such that the noise figure F(RG) of the amplifier (the noise figure being dependent on the real part of a complex generator impedance) is less than a predetermined desired value Fdesired for the noise figure in a range in which the real part of the predetermined output impedance of an arbitrary transfer element connected upstream of the amplifier also lies. Strictly speaking, genuine noise matching would be given only when the value of the real generator resistance, at the minimum of the profile of the noise figure of the amplifier as a function of the real generator resistance, corresponds to the real part of the output impedance of the preceding transfer element. The following description will address noise matching even when such a condition is only approximately satisfied.
If the above-mentioned parameters are chosen to give noise matching, then, according to the invention, the effective load on the collector or the drain of the transistor of the input stage of the amplifier is chosen to produce an amplifier input impedance that is substantially equal to the complex conjugate of the output impedance of the preceding transfer element. For example, power matching is performed by the choice of the load. In such a case, the invention exploits the Miller effect, according to which the collector-base capacitance or the drain-gate capacitance that is multiplied by the voltage gain, in the emitter circuit of a bipolar transistor or in the source circuit of a field-effect transistor, concomitantly determines the input capacitance of the amplifier circuit.
Because the voltage gain is generally a complex quantity that only depends on the (complex) load on the collector or the drain of the transistor of the input stage and, if appropriate, on the inductance (or the impedance) at the emitter or the source, the input impedance is able not only to be altered in terms of magnitude but also to be rotated within certain limits in the complex plane so that, by the suitable choice of the load in (nevertheless relatively wide) limits, the input impedance of the amplifier can be determined such that it corresponds to the complex conjugate of the output impedance of the preceding transfer element.
The intensity of the Miller effect has practically no influence on the input-related noise sources in the noise equivalent circuit diagram of the amplifier circuit. In other words, the noise matching and the power matching can be performed substantially independently of one another by the method according to the invention.
According to an embodiment of the method according to the invention, the noise matching is performed in a first step and the power matching is performed in a subsequent second step. Such a procedure has the advantage of lower complexity because a plurality of quantities have to be taken into account in the noise matching and the power matching can be effected only by a corresponding choice of the load as single quantity.
According to another embodiment of the method according to the invention, firstly a set (that preferably appears expedient) of the crucial parameters are chosen for noise matching. With these parameters, the minimum noise figure Fopt and the associated optimum real generator resistance Ropt are then determined. The determination can be effected, of course, using simplified approximation relationships or using analytical or numeral simulation methods. If these quantities correspond to the specifications for the permissible noise figure and the real part of the output impedance of the preceding stage, then the method can be continued with the implementation of the power matching.
It goes without saying, however, that it is also possible to attempt to modify the parameter values to obtain an even lower optimum noise figure and even better correspondence between the real optimum generator resistance and the real part of the complex output impedance.
In accordance with another mode of the invention, the noise figure or the optimum noise figure and the generator resistance or the optimum generator resistance, for an input stage with a bipolar transistor, are calculated to an approximation as a function of the base bulk resistance and the collector current. In a corresponding manner, the parameters gate-source capacitance and drain current can be used for an input stage with a field-effect transistor.
In accordance with a further mode of the invention, for an input stage with a field-effect transistor, the noise figure is calculated dependent upon at least one parameter of the group consisting of the generator resistance, the optimum noise figure, and the optimum generator resistance as a function of a gate-source capacitance and a drain current.
In accordance with an added mode of the invention, for a common-emitter bipolar transistor, the optimum noise figure Fopt and the optimum generator resistance Ropt are calculated with the following two approximation relationships:             R      sopt        ≈                                        β            F                                    g          m                    ⁢                        1          +                      2            ⁢                          g              m                        ⁢                          r              b                                          ⁢              xe2x80x83            ⁢              F        opt              ≈          1      +                        1                                    β              F                                      ⁢                              1            +                          2              ⁢                              g                m                            ⁢                              r                b                                                          ,
where xcex2F designates a DC gain of the transistor, rb designates the base bulk resistance, and gm designates the transistor transconductance and the following holds true for gm: gm=eIc/kT, where e designates the charge of an electron, k designates Boltzmann""s constant, T designates the absolute temperature, and Ic designates the collector current.
In accordance with a concomitant mode of the invention, the power matching for a common-emitter bipolar transistor with an emitter inductance Le and a load including a series circuit formed by a capacitance CL and a non-reactive resistance RL is determined with the following relationships:             X      L        =                  "LeftBracketingBar"                  1          +                                    g              m                        ⁢                          X              e                        ⁢            tan            ⁢                          xe2x80x83                        ⁢            Φ                          "RightBracketingBar"            ⁢      cos      ⁢              xe2x80x83            ⁢      Φ      ⁢                        χ          μ                                      g            m            •                    ⁢                      "LeftBracketingBar"                          Z              E                        "RightBracketingBar"                                          R      L        =                            tan          ⁡                      [                                          arctan                ⁢                                  (                                                            X                      e                                        ⁢                                          g                      m                                                        )                                            -              Φ                        ]                          ·                  X          L                    -                        χ          μ                                      g            m                    ·                      X            π                              
where Xe designates the reactance Xe=jxcfx89Le of the emitter inductance, Xxcexcdesignates the reactance of the collector-base capacitance Xxcexc=xe2x88x92j/xcfx89Cxcexc, gm designates the transconductance of the transistor, |ZE| designates the magnitude, "PHgr" designates the phase of the target input impedance Zxcex5=|ZE|xc2x7ejxcfx86, and Xxcfx80 designates the base-emitter impedance in a xcfx80 equivalent circuit diagram of the bipolar transistor.
Other features that are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for configuring low-noise integrated amplifier circuits, it is, nevertheless, not intended to be limited to the details shown because various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof, will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.